1. Field of the Invention
The present invention relates to a semiconductor memory including static memory cells.
2. Description of the Related Art
With a finer semiconductor device structure and an increase in the storage capacity, increase in a soft error rate due to alpha radiation and neutron radiation is a problem for a semiconductor memory such as a static RAM. Error correction using ECC (Error Correcting Code) is known for a technique to reduce an influence from the soft error. Japanese Unexamined Patent Application Publication No. 2000-11688, for example, discloses a technique in which an error correcting circuit is mounted in a dynamic RAM to write back error corrected data during a read operation and a refresh operation.
In a dynamic RAM, data in a memory cell is destroyed every time the data is read out. Thus, it is necessary to write back the data at every read operation. An actual writeback operation is performed while a bit line is driven to a power supply voltage or a ground voltage (i.e., the voltage of the bit line is sufficiently amplified) by a sense amplifier. On the other hand, in a static RAM data held in a memory cell is not destroyed even after the read operation, unlike in the dynamic RAM. Thus, the static RAM requires no writeback operation during the read operation, and includes no circuits for the writeback operation.
Therefore, in order to add data error correcting function to the static RAM, new circuits, not only an error correcting circuit but also a circuit for writing back error-corrected data to a memory cell, are required. In a conventional static RAM, data read in a read cycle is subjected to error correction in the outside of the static RAM, and thereafter the corrected data is written back in a write cycle.